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l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 0 ? revision history revision description issue date rev. 1.0 initial issue apr . 12 .200 7 rev. 1.1 revised 48 - ball 6mm 8mm tfbga package outline dimension may . 28 .200 7 rev. 1.2 added i sb spec. feb . 1 .200 8 rev. 1.3 added sl spec. jul . 2 .200 8 rev. 1.4 added i sb1 /i dr values whe n t a = 25 and t a = 40 revised features & ordering information lead free and green p ackage available to g reen p ackage available added packing type in ordering information deleted t solder in absolute maximun ratings mar . 30 .200 9 rev. 1.5 revised ordering information in page 1 1 aug.30.2010 rev. 1.6 deleted e grade apr.12.2011
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 1 ? features ? fast access time : 55 /70ns ? low power consumption: operating current : 30 / 20 ma ( typ . ) standby current : 5 ? a ( typ . ) ll - version 1.5 ? a ( typ. ) s l - version ? single 2.7v ~ 3.6v power supply ? all inputs and outputs ttl compatible ? fully static operation ? tr i - state output ? data byte control : lb# ( dq0 ~ dq7 ) ub# ( dq8 ~ dq15 ) ? data retention voltage : 1. 2 v ( min .) ? g reen p ackage available ? package : 4 8 - pin 12mm x 20mm tsop - i 4 8 - ball 6mm x 8mm tfbga general description the l y 62l 5 13 16 is a 8 , 388 , 608 - bit low power cmos static random access memory organized as 5 2 4 , 288 words by 16 bits. it is fabricated using very high performance, high reliability cmos technology. its standby current is stable within the range of operating temperature. the l y 62l 513 16 is well designed for low power application, and particularly well suited for battery back - up nonvolatile memory application. the l y 62l 513 16 operates from a single power supply of 2.7v ~ 3.6v and all inputs and outputs are fully ttl compatible product family product family operating temperature vcc range speed power dissipation standby( i sb1, typ.) operating( icc,typ.) ly62l51316 0 ~ 70 functional block diagram pin description symbol description a0 - a1 8 address inputs dq0 C cc power supply v ss ground control circuit decoder 512 kx 16 memory array column i / o a 0 - a 18 vcc vss dq 8 - dq 15 upper byte dq 0 - dq 7 lower byte i / o data circuit ce 2 we # oe # lb # ub # ce #
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 2 ? pin configuration absolute maximun ratings * parameter symbol rating unit voltage on v cc relative to v ss v t 1 - 0.5 to 4.6 v voltage on any other pin relative to v ss v t 2 - 0.5 to v cc +0.5 v operating temperature t a 0 to 70 (c grade) stg - 65 to 150 d 1 w dc output current i out 50 ma *stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not imp lied. exposure to the absolute maximum rating conditions for extended period may affect device reliability. tsop - i a 15 a 14 a 13 a 12 a 8 ly 62 l 51316 8 7 6 5 4 3 2 1 a 11 a 10 a 9 nc nc we # ce 2 nc ub # lb # a 18 a 17 a 7 a 6 a 5 a 4 a 3 a 2 a 1 14 13 12 11 10 9 16 15 22 21 20 19 18 17 24 23 dq 13 nc dq 15 dq 7 dq 14 dq 6 44 41 42 43 a 16 vss 48 47 45 46 33 36 35 34 38 39 40 37 25 28 27 26 30 31 32 29 dq 12 dq 5 dq 4 vcc dq 11 dq 3 dq 10 dq 2 dq 1 dq 9 dq 8 dq 0 oe # vss ce # a 0 tfbga nc a 3 a 10 a 9 a 11 a 0 a 14 a 8 nc we # dq 9 dq 14 dq 15 a 18 vss ce 2 a 13 dq 8 vcc vcc dq 7 a 15 vss ce # lb # dq 6 dq 2 dq 0 a 2 oe # a 1 a 6 a 5 a 4 ub # 1 2 3 4 5 6 h g c d e f a b a 12 nc a 17 a 7 a 16 dq 10 dq 11 dq 12 dq 13 dq 5 dq 4 dq 3 dq 1
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 3 ? truth table mode ce# c e2 oe# we# lb# ub# i/o operation supply current dq0 - dq7 dq8 - dq15 standby h x x x l x x x x x x x x x h x x h high C C C C C C sb , i sb1 output disable l l h h h h h h l x x l high C C C C cc ,i cc1 read l l l h h h l l l h h h l h l h l l d out high C out high C out d out i cc ,i cc1 write l l l h h h x x x l l l l h l h l l d in high C in high C in d in i cc ,i cc1 note: h = v ih , l = v il , x = don't care. dc electrical characteristics parameter symbol test condition min. typ. * 4 max. unit supply voltage v cc 2.7 3.0 3.6 v input high voltage v ih *1 2. 2 - v cc +0. 3 v input low voltage v il *2 - 0. 2 - 0.6 v input leakage current i li v cc R in R ss - 1 - 1 a output leakage c urrent i lo v cc R out R ss , output disabled - 1 - 1 a output high voltage v oh i oh = - 1ma 2. 2 2.7 - v output low voltage v ol i ol = 2 ma - - 0.4 v average operating power supply current i cc cycle time = min. ce# = v il and ce2 = v ih i i/o = 0ma o ther pins at v il or v ih - 5 5 - 30 40 ma - 70 - 20 3 0 ma i cc1 cycle time = 1 s ce# Q R cc - 0.2v i i/o = 0ma o ther pins at 0.2v or v cc - 0.2v - 4 8 ma standby power supply current i sb ce# = v ih or ce2 = v il o ther pins at v i l or v i h - 0.15 1 m a i sb1 ce# R cc - 0.2v or ce2 Q cc - 0.2v ll - 5 30 a lli - 5 5 0 a sl * 5 sli * 5 25 notes: 1. v ih (max) = v cc + 3.0 v for pulse width less than 10ns. 2. v il (min) = v ss - 3.0 v for pulse width less than 10ns. 3. over/undershoot specifications are characterized, not 100% tested. 4. typical values are included for reference only and are not guaranteed or tested. typical value s are measured at v cc = v cc (typ.) and t a = 25 5. this parameter is measured at v cc = 3.0v
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 4 ? capacitance (t a = 25 parameter symbol min. max unit input capacitance c in - 6 pf input/output capacitance c i/o - 8 pf note : these parameters are guaranteed by device characterization, but not production tested. ac test conditions input pulse levels 0 .2 v to v cc - 0.2 v input rise and fall times 3 ns input and output timing reference levels 1.5v output load c l = 3 0pf + 1ttl , i oh /i ol = - 1ma/ 2 ma ac electrical characteristics (1) read cycle parameter sym . ly62l 513 16 - 55 ly62l 513 16 - 70 unit min. max. min. max. read cycle time t rc 55 - 70 - ns address access time t aa - 55 - 70 ns chip enable access time t ace - 55 - 70 ns output enable access time t oe - 30 - 35 ns chip enable to output in low - z t clz * 10 - 10 - ns output enable to output in low - z t olz * 5 - 5 - ns chip disable to output in high - z t chz * - 20 - 2 5 ns output disable to output in high - z t ohz * - 20 - 25 ns output hold from address change t oh 10 - 10 - ns lb#, ub# a c cess time t ba - 55 - 70 ns lb#, ub# to high - z output t bhz * - 25 - 30 n s lb#, ub# to low - z output t blz * 10 - 10 - ns (2) write cycle parameter sym . ly62l 513 16 - 55 ly62l 513 16 - 70 unit min. max. min. max. write cycle time t wc 55 - 70 - ns address valid to end of write t aw 50 - 60 - ns chip enable to end of write t cw 50 - 60 - ns address set - up time t as 0 - 0 - ns write pulse width t wp 45 - 5 5 - ns write recovery time t wr 0 - 0 - ns data to write time overlap t dw 25 - 30 - ns data hold from end of write time t dh 0 - 0 - ns output active from end of write t ow * 5 - 5 - ns write to output in high - z t whz * - 2 0 - 25 ns lb#, ub# valid to end of write t b w 45 - 60 - ns *these parameters are guaranteed by device characterization, but not production tested.
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 5 ? t iming waveforms read cycle 1 (address controlled) (1,2) read cycle 2 ( ce# and ce2 and oe# controlled) (1,3,4,5) notes : 1. we# is high for read cycle. 2.device is continuously selected oe# = low , ce# = low, ce2 = high, lb# or ub# = low . 3.address must be valid prior to or coincident with ce# = low, ce2 = high, lb# or ub# = low transition; otherwise t aa is the limiting parameter. 4.t clz , t blz, t olz , t chz, t bhz and t ohz are specified with c l = 5pf. transition is measured 500mv from steady state. 5.at any given temperature and voltage condition, t chz is less than t clz , t bhz is less than t blz , t ohz is less than t olz . dout data valid t oh t aa address t rc previous data valid dout data valid high - z high - z t clz t olz t chz t ohz t oh oe # t oe lb #, ub # t bhz t ace t ba t blz ce # t aa address t rc ce 2
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 6 ? write cycle 1 ( we# controlled) (1,2,3,5,6) write cycle 2 ( ce# and ce2 c ontrolled) (1,2,5,6) dout din data valid t d w t d h ( 4 ) high - z t whz we # t wp t cw t wr t as ( 4 ) t ow lb #, ub # t bw ce # t aw address t wc ce 2 dout din data valid t d w t d h ( 4 ) high - z t whz we # lb #, ub # t cw t wp t bw ce # address t wr t as t aw t wc ce 2
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 7 ? write cycle 3 ( lb# , ub# controlled) (1,2,5 ,6 ) notes : 1. we#,ce#, lb#, ub# must be high or ce2 must be low during all address transitions. 2.a write occurs during the overlap of a low ce#, high ce2, low we#, lb# or ub# = low. 3.during a we# controlled write cycle with oe# low , t wp must be greater than t whz + t dw to allow the drivers to turn off and data to be placed on the bus. 4.during this period, i/o pins are in the output state, and input signals must not be applied. 5.if the ce#, lb#, ub# low transition and ce2 high transition occurs simultaneously with or after we# low transition, the outputs remain in a high impedance state. 6.t ow and t whz are specified with c l = 5pf. transition is measured 500mv from steady state. dout din data valid t d w t d h ( 4 ) high - z t whz we # lb #, ub # t cw t as t wp t bw ce # address t wr t aw t wc ce 2
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 8 ? data retention characteristics parameter symbol test condition min. typ. max. unit v cc for data retention v dr ce# R v cc - 0.2v or ce2 Q 0.2v 1.2 - 3.6 v data retention current i dr v cc = 1. 2 v ce# R v cc - 0.2v or ce2 Q 0.2v o ther pins at 0.2v or v cc - 0.2v l l - 2 25 a lli - 2 40 a sl sli 25 - 1 3 a 40 - 1 3 a sl - 1 15 a sli - 1 20 a chip disable to data retention time t cdr see data retention waveforms (below) 0 - - ns recovery time t r t rc * - - ns t rc * = read cycle time data retention waveform low vcc data retention waveform (1) ( ce# controlled) low vcc data retention waveform (2) ( ce2 controlled) low vcc data retention waveform ( 3 ) ( lb# , ub# controlled) vcc ce # v dr R 1 . 2 v ce # R v cc - 0 . 2 v v cc ( min .) v ih t r t cdr v ih v cc ( min .) vcc ce 2 v dr R 1 . 2 v ce 2 Q 0 . 2 v v cc ( min .) v i l t r t cdr v i l v cc ( min .) vcc lb #, ub # v dr R 1 . 2 v lb #, ub # R v cc - 0 . 2 v v cc ( min .) v ih t r t cdr v ih v cc ( min .)
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 9 ? package outline dimension 4 8 - pin 12mm x 20mm tsop - i package outline dimension
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 10 ? 48 - ball 6mm 8mm tfbga package outline dimension
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 11 ? ordering information l y 6 2 l 5 1 3 1 6 u v - w w x x y z z : p a c k i n g t y p e y : t e m p e r a t u r e r a n g e u : p a c k a g e t y p e w w : a c c e s s t i m e ( s p e e d ) x x : p o w e r t y p e v : l e a d i n f o r m a t i o n l : 4 8 - p i n 1 2 m m x 2 0 m m t s o p - i g : 4 8 - b a l l 6 m m x 8 m m t f b g a l : g r e e n p a c k a g e l l : u l t r a l o w p o w e r s l : s p e c i a l u l t r a l o w p o w e r b l a n k : ( c o m m e r c i a l ) 0 c ~ 7 0 c i : ( i n d u s t r i a l ) - 4 0 c ~ + 8 5 c b l a n k : t u b e o r t r a y t r a y : 4 8 - p i n 1 2 m m x 2 0 m m t s o p - i 4 8 - b a l l 6 m m x 8 m m t f b g a t : t a p e r e e l
l y 62l 51316 rev. 1. 6 512 k x 16 bit low power cmos sram l yontek i nc . reserves the rights to change the specifications and products without notice. 5f, no. 2, industry e. rd. ix, science - based industrial park, hsinchu 300, taiwan. tel: 886 - 3 - 6668838 fax: 886 - 3 - 6668836 12 ?

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